Biography and Research Information
OverviewAI-generated summary
Joshua Hollis's research focuses on the design and implementation of in-memory computing architectures, specifically for Field-Programmable Gate Arrays (FPGAs). His work investigates the potential of Processor-in-Memory (PIM) architectures, exploring whether they represent an "overlay" or an "overhaul" of existing computational paradigms. Hollis has published work on creating scalable computational memory fabric overlays by leveraging the Block RAMs (BRAMs) within FPGAs, enabling these memory units to perform computations directly. He has collaborated with David Andrews and Miaoqing Huang at the University of Arkansas at Fayetteville on multiple publications, as well as Ehsan Kabir. Hollis has a h-index of 1, with a total of 4 publications and 5 citations.
Metrics
- h-index: 1
- Publications: 4
- Citations: 5
Selected Publications
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays (2023)
Collaboration Network
Top Collaborators
MD Arafat Kabir
University of Arkansas at Fayetteville (US)
3 shared publications
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Atiyehsadat Panahi
University of South Carolina (US)
3 shared publications
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Jason D. Bakos
Cadence Design Systems (United States) (US)
3 shared publications
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Miaoqing Huang
University of Arkansas at Fayetteville
3 shared publications
In database
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
David Andrews
University of Arkansas at Fayetteville (US)
3 shared publications
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Ehsan Kabir
University of Arkansas at Fayetteville
2 shared publications
In database
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Eli Levy-Mackay
University of Arkansas at Fayetteville
2 shared publications
In database
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
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