Ehsan Kabir Data-verified
Affiliation confirmed via AI analysis of OpenAlex, ORCID, and web sources.
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Biography and Research Information
OverviewAI-generated summary
Ehsan Kabir's research focuses on the acceleration of machine learning models, particularly those involving time-series forecasting and dynamic system modeling. He has investigated techniques for enhancing the performance of Long Short-Term Memory (LSTM) networks and Transformer encoders, with a specific emphasis on hardware acceleration using Field-Programmable Gate Arrays (FPGAs). His work includes the development of programmable accelerators for convolutional and multilayer perceptron neural networks, as well as attention mechanisms within Transformer architectures.
Kabir has also explored the application of numerical analysis in the context of biosensing, specifically for the detection of SARS-CoV-2. His research network includes frequent collaborations with David Andrews and Miaoqing Huang at the University of Arkansas at Fayetteville, with whom he has co-authored numerous publications. With an h-index of 4 and 52 total citations across 20 publications, Kabir is actively contributing to the fields of machine learning and hardware acceleration.
Metrics
- h-index: 4
- Publications: 23
- Citations: 53
Selected Publications
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Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms (2025)
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Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs (2024)
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ProTEA: Programmable Transformer Encoder Acceleration on FPGA (2024)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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Accelerating LSTM-Based High-Rate Dynamic System Models (2023)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA (2022)
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High-Rate Machine Learning for Forecasting Time-Series Signals (2022)
Collaboration Network
Top Collaborators
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
Showing 5 of 12 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
Showing 5 of 12 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
Showing 5 of 9 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- Accelerating LSTM-based High-Rate Dynamic System Models
- FAMOUS: Flexible Accelerator for the Attention Mechanism of Transformer on UltraScale+ FPGAs
Showing 5 of 7 shared publications
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FAMOUS: Flexible Accelerator for the Attention Mechanism of Transformer on UltraScale+ FPGAs
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
- Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms
- A runtime-adaptive transformer neural network accelerator on FPGAs
- High-Rate Machine Learning for Forecasting Time-Series Signals
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Accelerating LSTM-based High-Rate Dynamic System Models
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Accelerating LSTM-based High-Rate Dynamic System Models
- Numerical Analysis of a Highly Sensitive Surface Plasmon Resonance Sensor for SARS-CoV-2 Detection
- Numerical Analysis of a Highly Sensitive Surface Plasmon Resonance Sensor for SARS-CoV-2 Detection
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
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