Ehsan Kabir
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Research Assistant
Also affiliated: Bangladesh University of Engineering and Technology (2017–2021); Integrity Systems (United States) (2025)
Graduate Student Researcher
Research Areas
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Biography and Research Information
OverviewAI-generated summary
Ehsan Kabir's research focuses on the development and acceleration of machine learning models, particularly for time-series forecasting and dynamic system modeling. He has investigated high-rate machine learning techniques and explored the acceleration of Long Short-Term Memory (LSTM) networks. His work also extends to hardware acceleration, with a focus on Field-Programmable Gate Arrays (FPGAs). Kabir has published research on flexible accelerators for transformer attention mechanisms and on FPGA-based processor-in-memory architectures. He also has a publication on the numerical analysis of a surface plasmon resonance sensor for SARS-CoV-2 detection.
Kabir collaborates extensively with researchers at the University of Arkansas at Fayetteville, including David Andrews and Miaoqing Huang, with whom he shares multiple publications. His scholarly output includes 23 publications and has garnered 54 citations, with an h-index of 4.
Metrics
- h-index: 4
- Publications: 23
- Citations: 55
Selected Publications
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A runtime-adaptive transformer neural network accelerator on FPGAs (2025)
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Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms (2025)
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Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs (2024)
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ProTEA: Programmable Transformer Encoder Acceleration on FPGA (2024)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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Accelerating LSTM-Based High-Rate Dynamic System Models (2023)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA (2022)
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High-Rate Machine Learning for Forecasting Time-Series Signals (2022)
Collaboration Network
Top Collaborators
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
Showing 5 of 8 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
Showing 5 of 7 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
Showing 5 of 6 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms
- High-Rate Machine Learning for Forecasting Time-Series Signals
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
- Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Accelerating LSTM-Based High-Rate Dynamic System Models
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