David Andrews Data-verified

Affiliation confirmed via AI analysis of OpenAlex, ORCID, and web sources.

Assistant Professor

Last publication 2025 Last refreshed 2026-05-22

faculty

23 h-index 201 pubs 2,162 cited

Biography and Research Information

OverviewAI-generated summary

David Andrews' research focuses on the intersection of computer engineering, machine learning, and cybersecurity. He has published work on hardware implementations of cryptographic algorithms, including a masked pure-hardware implementation of the Kyber cryptographic algorithm and power-based side-channel attack analysis on post-quantum cryptography algorithms. His work also extends to machine learning applications, with publications on high-rate machine learning for forecasting time-series signals and accelerating LSTM-based high-rate dynamic system models. Andrews has also investigated the development of specialized hardware for machine learning, such as a customizable domain-specific memory-centric FPGA overlay.

His research group at the University of Arkansas at Fayetteville collaborates with faculty members such as Miaoqing Huang, Ehsan Kabir, and Tendayi Kamucheka. Andrews has received funding for his work, including a $100,000 NSF grant as Co-PI for research on infrastructure to perform side-channel attacks on cryptographic algorithms. His scholarship metrics include an h-index of 10, with 33 total publications and 388 total citations.

Metrics

  • h-index: 23
  • Publications: 201
  • Citations: 2,162

Selected Publications

  • DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing (2025)
    1 citation DOI OpenAlex
  • N-TORC: Native Tensor Optimizer for Real-Time Constraints (2025)
  • Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms (2025)
  • Resource Scheduling for Real-Time Machine Learning (2025)
    1 citation DOI OpenAlex
  • Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs (2024)
    2 citations DOI OpenAlex
  • ProTEA: Programmable Transformer Encoder Acceleration on FPGA (2024)
    3 citations DOI OpenAlex
  • IMAGine: An In-Memory Accelerated GEMV Engine Overlay (2024)
    3 citations DOI OpenAlex
  • The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators (2024)
    1 citation DOI OpenAlex
  • Ph.D. Project: A Compiler-Driven Approach to HW/SW Co-Design of Deep-Learning Accelerators (2024)
  • Towards Cloud-based Infrastructure for Post-Quantum Cryptography Side-channel Attack Analysis (2023)
    1 citation DOI OpenAlex
  • FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
    4 citations DOI OpenAlex
  • Accelerating LSTM-Based High-Rate Dynamic System Models (2023)
    6 citations DOI OpenAlex
  • FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
  • Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays (2023)
    1 citation DOI OpenAlex
  • A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA (2022)
    3 citations DOI OpenAlex

View all publications on OpenAlex →

Federal Grants 1 $100,000 total

NSF Co-PI Oct 2022 - Sep 2024

CCRI:Planning-C:SCA-in-Cloud: Infrastructure to Perform Side-Channel Attacks on Cryptographic Algorithms

CCRI-CISE Cmnty Rsrch Infrstrc $100,000

Collaboration Network

12 Collaborators 7 Institutions 1 Country

Top Collaborators

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