Match tier
Confirmed
Presence
Current · Arkansas
Last published
2025
Sources
OpenAlex · ORCID
Refreshed
2026-10-08
D
David A. Andrews
Affiliation confirmed via AI analysis of OpenAlex, ORCID, and web sources.
Assistant Professor
Also affiliated: Illinois College (2012); Anglian Water Services (United Kingdom) (1994); University of Dallas (2012–2023); European Commission (2012); Directorate-General Joint Research Centre (2012–2014); Joint Research Centre (2014); Harbor Branch Oceanographic Institute (1984); Rice University (1999)
9 h-index
32 pubs
363 cited
Research Areas
Biomedical Subjects
Links
Biography and Research Information
OverviewAI-generated summary
David A. Andrews, an Assistant Professor at the University of Arkansas at Fayetteville, leads a research group focused on microbial genetics and plant-pathogen interactions. His work investigates the molecular mechanisms underlying fungal growth and development, particularly in the context of plant diseases. He has published research on genes in Ustilago maydis, a significant plant pathogen, exploring their roles in filamentous growth and signal transduction pathways, including MAP kinase cascades.
Andrews' research also extends to developing efficient tools for genetic manipulation in fungi, such as the OSCAR system for ATMT-based gene deletion construction. His scholarly output includes 33 publications with an h-index of 10 and 392 citations. He has received funding from the National Science Foundation (NSF) for research on infrastructure to perform side-channel attacks on cryptographic algorithms, serving as a Co-PI on a $100,000 award. He collaborates with several researchers at the University of Arkansas at Fayetteville, including Miaoqing Huang, Ehsan Kabir, MD Arafat Kabir, and Tendayi Kamucheka.
Metrics
- h-index: 9
- Publications: 32
- Citations: 363
Positions
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Associate Dean 2017–presentUniversity of Dallas Constantin College ORCID
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Assistant Professor 1998–presentUniversity of Dallas Mathematics ORCID
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Assistant Professor publications 2024–2025University of Arkansas at Fayetteville ORCID
Selected Publications
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DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing (2025)
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N-TORC: Native Tensor Optimizer for Real-Time Constraints (2025)
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Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms (2025)
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Resource Scheduling for Real-Time Machine Learning (2025)
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Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs (2024)
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ProTEA: Programmable Transformer Encoder Acceleration on FPGA (2024)
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IMAGine: An In-Memory Accelerated GEMV Engine Overlay (2024)
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The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators (2024)
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Ph.D. Project: A Compiler-Driven Approach to HW/SW Co-Design of Deep-Learning Accelerators (2024)
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Towards Cloud-based Infrastructure for Post-Quantum Cryptography Side-channel Attack Analysis (2023)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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Accelerating LSTM-Based High-Rate Dynamic System Models (2023)
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FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? (2023)
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Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays (2023)
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A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA (2022)
Federal Grants 1 $100,000 total
NSF
Co-PI
Oct 2022 - Sep 2024
Collaboration Network
Top Collaborators
Miaoqing Huang
University of Arkansas at Fayetteville
24 shared publications
In database
- A Masked Pure-Hardware Implementation of Kyber Cryptographic Algorithm
- Modular Design of Fully Pipelined Reduction Circuits on FPGAs
- Scalable Memory Hierarchies for Embedded Manycore Systems
- Developing application-specific multiprocessor platforms on FPGAs
- High-Rate Machine Learning for Forecasting Time-Series Signals
Showing 5 of 24 shared publications
Jason D. Bakos
University of South Carolina (US)
13 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- ProTEA: Programmable Transformer Encoder Acceleration on FPGA
Showing 5 of 13 shared publications
Sen Ma
University of Arkansas at Fayetteville (US)
11 shared publications
- A run time interpretation approach for creating custom accelerators
- Just In Time Assembly of Accelerators
- Scalable Memory Hierarchies for Embedded Manycore Systems
- Developing application-specific multiprocessor platforms on FPGAs
- Archborn: an open source tool for automated generation of chip heterogeneous multiprocessor architectures
Showing 5 of 11 shared publications
Atiyehsadat Panahi
University of South Carolina (US)
10 shared publications
- An FPGA-Based Upper-Limb Rehabilitation Device for Gesture Recognition and Motion Evaluation Using Multi-Task Recurrent Neural Networks
- SPAR-2: A SIMD Processor Array for Machine Learning in IoT Devices
- FPGA-Based Gesture Recognition with Capacitive Sensor Array using Recurrent Neural Networks
- High-Rate Machine Learning for Forecasting Time-Series Signals
- A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications
Showing 5 of 10 shared publications
Ehsan Kabir
University of Arkansas at Fayetteville
8 shared publications
In database
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
Showing 5 of 8 shared publications
Jason Agron
University of Arkansas at Fayetteville (US)
7 shared publications
- Building heterogeneous reconfigurable systems with a hardware microkernel
- Hardware Microkernels for Heterogeneous Manycore Systems
- Hardware microkernels - a novel method for constructing operating systems for heterogeneous multi-core platforms
- Distributed Hardware-Based Microkernels: Making Heterogeneous OS Functionality a System Primitive
- Operating System Structures for Multiprocessor Systems on Programmable Chip
Showing 5 of 7 shared publications
Zeyad Aklah
University of Arkansas at Fayetteville (US)
6 shared publications
- A run time interpretation approach for creating custom accelerators
- Just In Time Assembly of Accelerators
- A Flexible Multilayer Perceptron Co-processor for FPGAs
- A Runtime Programmable Accelerator for Convolutional and Multilayer Perceptron Neural Networks on FPGA
- A Dynamic Overlay Supporting Just-In-Time Assembly to Construct Customized Hardware Accelerators
Showing 5 of 6 shared publications
Austin Downey
University of South Carolina (US)
6 shared publications
- High-Rate Machine Learning for Forecasting Time-Series Signals
- Accelerating LSTM-Based High-Rate Dynamic System Models
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- Resource Scheduling for Real-Time Machine Learning
- Optimized Coding and Parameter Selection for Efficient FPGA Design of Attention Mechanisms
Showing 5 of 6 shared publications
MD Arafat Kabir
University of Arkansas at Fayetteville
6 shared publications
In database
- Famous: Flexible Accelerator for the Attention Mechanism of Transformer on Ultrascale+ FPGAs
- FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ?
- IMAGine: An In-Memory Accelerated GEMV Engine Overlay
- Making BRAMs Compute: Creating Scalable Computational Memory Fabric Overlays
- The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators
Showing 5 of 6 shared publications
Joel Mandebi Mbongue
Advanced Micro Devices (United States) (US)
5 shared publications
- FPGAVirt: A Novel Virtualization Framework for FPGAs in the Cloud
- A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications
- Transparent Acceleration of Image Processing Kernels on FPGA-Attached Hybrid Memory Cube Computers
- DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing
- Enabling Transparent Acceleration of OpenCV Library Kernels on a Hybrid Memory Cube Computer
Alexander Nelson
University of Arkansas at Fayetteville
5 shared publications
In database
- A Masked Pure-Hardware Implementation of Kyber Cryptographic Algorithm
- An FPGA-Based Upper-Limb Rehabilitation Device for Gesture Recognition and Motion Evaluation Using Multi-Task Recurrent Neural Networks
- FPGA-Based Gesture Recognition with Capacitive Sensor Array using Recurrent Neural Networks
- An FPGA-Based Upper-Limb Rehabilitation Device for Gesture Recognition and Motion Evaluation Using Multi-Task Recurrent Neural Networks
- Towards Cloud-based Infrastructure for Post-Quantum Cryptography Side-channel Attack Analysis
Tendayi Kamucheka
University of Arkansas at Fayetteville
5 shared publications
In database
- A Masked Pure-Hardware Implementation of Kyber Cryptographic Algorithm
- IMAGine: An In-Memory Accelerated GEMV Engine Overlay
- The BRAM is the Limit: Shattering Myths, Shaping Standards, and Building Scalable PIM Accelerators
- DA-VinCi: A Deep-Learning Accelerator Overlay Using In-Memory Computing
- Ph.D. Project: A Compiler-Driven Approach to HW/SW Co-Design of Deep-Learning Accelerators
Marco Platzner
Paderborn University (DE)
4 shared publications
- Programming models for reconfigurable manycore systems
- Multithreaded Programming of Reconfigurable Embedded Systems
- An FPGA/HMC-Based Accelerator for Resolution Proof Checking
- An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology
Eugene Cartwright
University of Arkansas at Fayetteville (US)
3 shared publications
- Scalable Memory Hierarchies for Embedded Manycore Systems
- Creating HW/SW co-designed MPSoPC's from high level programming models
- Achieving portability and efficiency over chip heterogeneous multiprocessor systems
Mitchell A. Thornton
University of Arkansas at Fayetteville (US)
3 shared publications
- Graph analysis and transformation techniques for runtime minimization in multi-threaded architectures
- Integration of CAD tools and structured design principles in an undergraduate computer engineering curriculum
- Resource estimation for parallel architectures with distributed processor/memory nodes
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