Research Areas
Biography and Research Information
OverviewAI-generated summary
John Venker, a graduate student at the University of Arkansas at Fayetteville, focuses his research on semiconductor devices and circuit design. His recent publications investigate low-power analog circuits for spiking neural networks, a bandgap voltage reference with high power supply rejection ratio for low-dropout voltage regulators, and a method for extracting threshold voltage in silicon carbide MOSFETs at high temperatures. Venker has collaborated with other researchers at the University of Arkansas, including Abu Shahir Md Khalid Hasan and Jeff Dix, on multiple projects. His work contributes to the field of advanced semiconductor device design and circuit implementation.
Metrics
- h-index: 1
- Publications: 3
- Citations: 6
Selected Publications
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A 0.8 V Bandgap Voltage Reference with High PSRR for Low-Dropout Voltage Regulator in 22nm FD-SOI (2024)
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Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature (2023)
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A Low-Power Analog Cell for Implementing Spiking Neural Networks in 65 nm CMOS (2023)
Collaboration Network
Top Collaborators
- A Low-Power Analog Cell for Implementing Spiking Neural Networks in 65 nm CMOS
- A 0.8 V Bandgap Voltage Reference with High PSRR for Low-Dropout Voltage Regulator in 22nm FD-SOI
- Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature
- A 0.8 V Bandgap Voltage Reference with High PSRR for Low-Dropout Voltage Regulator in 22nm FD-SOI
- Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature
- A 0.8 V Bandgap Voltage Reference with High PSRR for Low-Dropout Voltage Regulator in 22nm FD-SOI
- Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature
- A 0.8 V Bandgap Voltage Reference with High PSRR for Low-Dropout Voltage Regulator in 22nm FD-SOI
- A Low-Power Analog Cell for Implementing Spiking Neural Networks in 65 nm CMOS
- Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature
- Threshold Voltage Extraction Method for Low-Voltage SiC MOSFETs at High-Temperature
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