Hui Wang
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Also affiliated: Rutherford Appleton Laboratory (2010–2018); Zhejiang Normal University (1994); North University of China (2009); University of Connecticut (1997); Xidian University (2008–2015); Shandong University (2002–2019); Science and Technology Facilities Council (2015–2016); Henan University of Science and Technology (2008); Politecnico di Torino (2014–2015); Xi'an Shiyou University (2019); Anhui University of Finance and Economics (2008); Chinese Academy of Sciences (2011–2021); Harbin Institute of Technology (2025); Nankai University (2008); Shandong Normal University (2011); Southern University of Science and Technology (2016); Henan University of Technology (2014); Nanjing University of Posts and Telecommunications (2021–2022); UK Research and Innovation (2024); State Key Laboratory on Integrated Optoelectronics (2011); II-VI (United States) (2021); Xi'an Technological University (2019); Shanghai Advanced Research Institute (2021); Peng Cheng Laboratory (2023); Changchun Institute of Technology (2024); Institute of Semiconductors (2011); Shanghai Institute of Ceramics (2013); University of Chinese Academy of Sciences (2013); Shanxi Transportation Research Institute (2014); State Key Laboratory of Industrial Control Technology (2013–2015); State Key Laboratory of Crystal Materials (2013); Communication University of China (2009–2013); Zhejiang University (2013–2015); University of Science and Technology Beijing (2021)
Research Areas
Biomedical Subjects
Links
Biography and Research Information
OverviewAI-generated summary
Hui Wang's research has explored diverse areas, including semiconductor devices and molecular biology. In the realm of electronics, Wang has contributed to the development of terahertz frequency multipliers and mixers based on Schottky diodes, as well as low radar cross-section (RCS) microstrip patch antennas. Further work in this domain includes research on low-RCS, high-gain, and wideband mushroom antennas, and a review of silicon carbide CMOS technology for harsh environments. Wang's biological research includes investigating the role of resveratrol in modulating angiogenesis through the GSK3β/β-catenin/TCF-dependent pathway in human endothelial cells. Additionally, research has identified NOD2 as a novel target of the RNA-binding protein HuR in the context of NADPH oxidase-mediated HuR signaling in diabetic nephropathy. Wang has an h-index of 15 with 76 total publications and 992 total citations. Key collaborators include Pengyu Lai, Zuhuang Chen, Homer Alan Mantooth, and Kevin Chen, all from the University of Arkansas at Fayetteville.
Metrics
- h-index: 15
- Publications: 76
- Citations: 992
Selected Publications
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Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity (2025)
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TCAD-Aided Investigation of Temperature-Dependent Behavior in 4H-SiC P-Channel MOSFETs Up to 500°C (2025)
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(Invited) High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC (2025)
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Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications (2025)
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Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures (2024)
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Electrical Safe Operating Area and Latent Damage of SiC Low-Voltage nMOS Under TLP and VF-TLP Stresses (2024)
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A review of silicon carbide CMOS technology for harsh environments (2024)
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Current Injection Effect on ESD Behaviors of the Parasitic Bipolar Transistors inside P+/N-well diode (2023)
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Characterization of Gate-Oxide Degradation Location for SiC MOSFETs Based on the Split C–V Method Under Bias Temperature Instability Conditions (2023)
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Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection (2022)
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Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections (2021)
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Investigation of ESD Protection in SiC BCD Process (2019)
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Investigation of parasitic bipolar transistor in rail-based electrostatic discharge (ESD) protection circuits (2019)
Collaboration Network
Top Collaborators
- A review of silicon carbide CMOS technology for harsh environments
- Investigation of ESD Protection in SiC BCD Process
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Investigation of parasitic bipolar transistor in rail-based electrostatic discharge (ESD) protection circuits
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
Showing 5 of 11 shared publications
- A review of silicon carbide CMOS technology for harsh environments
- Characterization of Gate-Oxide Degradation Location for SiC MOSFETs Based on the Split C–V Method Under Bias Temperature Instability Conditions
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Investigation of parasitic bipolar transistor in rail-based electrostatic discharge (ESD) protection circuits
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
Showing 5 of 8 shared publications
- A review of silicon carbide CMOS technology for harsh environments
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Electrical Safe Operating Area and Latent Damage of SiC Low-Voltage nMOS Under TLP and VF-TLP Stresses
- Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications
- (Invited) High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
Showing 5 of 7 shared publications
- Investigation of ESD Protection in SiC BCD Process
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Investigation of ESD Protection in SiC BCD Process
- Current Injection Effect on ESD Behaviors of the Parasitic Bipolar Transistors inside P+/N-well diode
- (Invited) High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
- A review of silicon carbide CMOS technology for harsh environments
- (Invited) High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
- Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity
- Investigation of ESD Protection in SiC BCD Process
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Investigation of ESD Protection in SiC BCD Process
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Investigation of ESD Protection in SiC BCD Process
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- A review of silicon carbide CMOS technology for harsh environments
- Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity
- A review of silicon carbide CMOS technology for harsh environments
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- TCAD-Aided Investigation of Temperature-Dependent Behavior in 4H-SiC P-Channel MOSFETs Up to 500°C
- Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity
- Investigation of parasitic bipolar transistor in rail-based electrostatic discharge (ESD) protection circuits
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
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