Tristan M. Evans
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Researcher
Also affiliated: Louisiana State University (2022); ROHM (2013–2015)
Faculty Researcher
Research Areas
Links
Biography and Research Information
OverviewAI-generated summary
Tristan M. Evans' research focuses on the design automation of power electronic modules, particularly multichip power modules (MCPMs). His work addresses challenges in creating high-density, hierarchical, and heterogeneous 2.5-D and 3-D MCPMs. Evans has investigated techniques for optimizing power module layout, including placement and routing strategies, and has developed methods for accurate parasitic extraction that account for eddy-current losses. His research also explores thermal runaway mitigation through electrothermal constraints mapping and utilizes VLSI-inspired design automation for scalable power electronics layout optimization. Evans has published 21 papers, accumulating 391 citations, and holds an h-index of 12. He has collaborated with several researchers at the University of Arkansas at Fayetteville, including Yarui Peng and Quang Trung Le.
Metrics
- h-index: 12
- Publications: 21
- Citations: 417
Selected Publications
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VLSI-Inspired Design Automation for Scalable Power Electronics Layout Optimization (2023)
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A Partial Discharge Inception Voltage Modeling Approach (2023)
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PowerSynth 2: Physical Design Automation for High-Density 3-D Multichip Power Modules (2022)
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Thermal Runaway Mitigation through Electrothermal Constraints Mapping for MCPM Layout Optimization (2022)
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Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses (2022)
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Placement and Routing for Power Module Layout (2021)
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PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules (2021)
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Electronic Design Automation (EDA) Tools and Considerations for Electro-Thermo-Mechanical Co-Design of High Voltage Power Modules (2020)
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PowerSynth progression on layout optimization for reliability and signal integrity (2020)
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Development of EDA Techniques for Power Module EMI Modeling and Layout Optimization (2019)
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Modeling and Analysis of Near-Field Radiated Emission in Wide Bandgap Power Modules (2019)
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PEEC Method and Hierarchical Approach Towards 3D Multichip Power Module (MCPM) Layout Optimization (2019)
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Electrothermal Cosimulation for Predicting the Power Loss and Temperature of SiC MOSFET Dies Assembled in a Power Module (2019)
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Toward Partial Discharge Reduction by Corner Correction in Power Module Layouts (2018)
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PowerSynth: A Power Module Layout Generation Tool (2018)
Collaboration Network
Top Collaborators
- PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules
- PowerSynth 2: Physical Design Automation for High-Density 3-D Multichip Power Modules
- Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses
- Placement and Routing for Power Module Layout
- A Partial Discharge Inception Voltage Modeling Approach
Showing 5 of 7 shared publications
- PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules
- PowerSynth 2: Physical Design Automation for High-Density 3-D Multichip Power Modules
- Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses
- Placement and Routing for Power Module Layout
- Thermal Runaway Mitigation through Electrothermal Constraints Mapping for MCPM Layout Optimization
Showing 5 of 6 shared publications
- PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules
- PowerSynth 2: Physical Design Automation for High-Density 3-D Multichip Power Modules
- Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses
- Thermal Runaway Mitigation through Electrothermal Constraints Mapping for MCPM Layout Optimization
- PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules
- PowerSynth 2: Physical Design Automation for High-Density 3-D Multichip Power Modules
- Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses
- PowerSynth Design Automation Flow for Hierarchical and Heterogeneous 2.5-D Multichip Power Modules
- Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses
- A Partial Discharge Inception Voltage Modeling Approach
- Thermal Runaway Mitigation through Electrothermal Constraints Mapping for MCPM Layout Optimization
- A Partial Discharge Inception Voltage Modeling Approach
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