Yarui Peng Data-verified

Affiliation confirmed via AI analysis of OpenAlex, ORCID, and web sources.

Federal Grant PI

Junior Chair Professor

Last publication 2025 Last refreshed 2026-05-22

faculty

yrpeng@seu.edu.cn

14 h-index 65 pubs 773 cited

Biography and Research Information

OverviewAI-generated summary

Yarui Peng's research focuses on computer-aided design, analysis, and optimization for very-large-scale integration (VLSI) circuits and emerging technologies. His work investigates methodologies and algorithms for parasitic extraction, signal integrity analysis and optimization, and the mitigation of reliability issues in thermal and power delivery for 2.5D and 3D integrated circuits (ICs). Peng also studies the improvement of electro-thermal reliability in power systems, such as multi-chip power modules (MCPMs), through layout synthesis and simultaneous optimization of heat dissipation and electrical performance.

Peng received his B.S. from Tsinghua University and M.S. and Ph.D. degrees from Georgia Institute of Technology. He is currently an Assistant Professor in the Computer Science and Computer Engineering Department at the University of Arkansas. He also collaborates with the NSF-sponsored Engineering Research Center for Power Optimization of Electro-Thermal Systems. His work has been supported by the National Science Foundation (NSF) through a CAREER award totaling $500,000 for research on chiplet-package co-optimizations for 2.5D heterogeneous systems-on-chips (SoCs).

With a h-index of 14 and over 764 citations across 65 publications, Peng actively collaborates with researchers at the University of Arkansas, including Imam Al Razi, Quang Trung Le, Tristan M. Evans, and David Huitink. He maintains an active lab website to share his research activities.

Metrics

  • h-index: 14
  • Publications: 65
  • Citations: 773

Selected Publications

  • PowerSynth 2: Automated Power Electronics Physical Design Synthesis With Custom and Heterogeneous Components (2025)
  • Adaptive Redistribution Layer Routing for Chiplet-Package Co-Design in 2.5D System (2025)
  • Automated Layout Optimization Methods of a Bidirectional DC-DC ZVS Converter Using PowerSynth (2023)
    3 citations DOI OpenAlex
  • VLSI-Inspired Design Automation for Scalable Power Electronics Layout Optimization (2023)
  • A Comparative Study on Optimization Algorithms in PowerSynth 2 (2023)
    2 citations DOI OpenAlex
  • Factoring Interacting Stress Mechanisms in Design for Reliability of Extreme Environment Power Modules (2023)
    1 citation DOI OpenAlex
  • Factoring Interacting Stress Mechanisms in Design for Reliability of Extreme Environment Power Modules (2023)
  • PowerSynth 2: Physical Design Automation for High-Density 3-D Multichip Power Modules (2022)
    26 citations DOI OpenAlex
  • Electromigration-Aware Reliability Optimization of MCPM Layouts Using PowerSynth (2022)
    3 citations DOI OpenAlex
  • Thermal Runaway Mitigation through Electrothermal Constraints Mapping for MCPM Layout Optimization (2022)
    2 citations DOI OpenAlex
  • Design Challenges of Intrachiplet and Interchiplet Interconnection (2022)
    16 citations DOI OpenAlex
  • Fast and Accurate Parasitic Extraction in Multichip Power Module Design Automation Considering Eddy-Current Losses (2022)
    14 citations DOI OpenAlex
  • Hierarchical Layout Synthesis and Optimization Framework for High-Density Power Module Design Automation (2021)
    4 citations DOI OpenAlex
  • Fast and Accurate Inductance Extraction for Power Module Layout Optimization Using Loop-Based Method (2021)
    5 citations DOI OpenAlex
  • A Scalable In-Context Design and Extraction Flow for Heterogeneous 2.5D Chiplet-Package Co-Optimization (2021)

View all publications on OpenAlex →

Federal Grants 1 $500,000 total

NSF PI Jun 2021 - May 2026

CAREER: SHF: Chiplet-Package Co-Optimizations for 2.5D Heterogeneous SoCs with Low-Overhead IOs

Information Technology Researc, Software & Hardware Foundation $500,000

Collaboration Network

32 Collaborators 20 Institutions 7 Countries

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