Kevin Chen
Affiliation confirmed via AI analysis of OpenAlex, ORCID, and web sources.
Research Assistant Professor
Also affiliated: University of Nebraska–Lincoln (2017); Oak Ridge National Laboratory (2018); Google (United States) (2018); Centre National de la Recherche Scientifique (2015); Taiwan Semiconductor Manufacturing Company (United States) (2023); Harvard University (2014); Lawrence Berkeley National Laboratory (2005–2017); International Food Policy Research Institute (2022); University of Pittsburgh (2011–2023); Baylor College of Medicine (2019); Asian Development Bank Institute (2022); Joint Genome Institute (2004–2005); University of California, Irvine (2020–2022); Purdue University West Lafayette (2023); National Central University (2016); University of Michigan (2017); Shantou University (2016); Centre de Recherches Pétrographiques et Géochimiques (2015); Nautilus (United States) (2022); Louis Stokes Cleveland VA Medical Center (2017); Asian Development Bank (2022); Stanford Medicine (2023); European Molecular Biology Laboratory (2005); Texas Children's Hospital (2019); Industrial Technology Research Institute (2004–2015); European Molecular Biology Laboratory (2005); Molecular Foundry (2013); Center for Nanophase Materials Sciences (2018); Arizona State University (2012); Case Western Reserve University (2014); Syracuse University (2019); Rice University (2019); Zhejiang University (2022); University of California, Berkeley (2001–2017); Stanford University (2022–2023)
Research Areas
Biomedical Subjects
Links
Biography and Research Information
OverviewAI-generated summary
Kevin Chen's research focuses on the design, optimization, and packaging of high-voltage power modules, particularly those utilizing silicon carbide (SiC) and gallium nitride (GaN) semiconductor technologies. His work addresses challenges related to thermal management, system integration, and electromagnetic interference (EMI) mitigation in these advanced power electronic systems. Recent publications include studies on substrate-less power semiconductor packaging for recyclability, 10 kV SiC MOSFET power modules with optimized system interfaces, and a review of silicon carbide CMOS technology for harsh environments.
Chen has also investigated the design and optimization of gate driver integrated multichip 3-D GaN power modules and high-voltage SiC power modules for low parasitics and compatible system interfaces. His research extends to high-density power module packaging tutorials and EMI mitigation strategies using stacking DBC substrates. Further work includes the feasibility design of tight integration of low-inductance SiC power modules with microchannel coolers.
With an h-index of 32, 124 total publications, and over 13,000 citations, Chen is recognized as a highly cited researcher. He actively collaborates with other researchers at the University of Arkansas at Fayetteville, including H. Alan Mantooth, Xiaoling Li, Zhong Chen, and Sudharsan Chinnaiyan, with whom he shares multiple publications.
Metrics
- h-index: 32
- Publications: 121
- Citations: 13,333
Positions
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Research Assistant Professor publications 2024–2025University of Arkansas at Fayetteville Listing
Selected Publications
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Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity (2025)
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Thermal Analysis and Modeling of Gallium Oxide Diode-based Half Bridge Power Module (2025)
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Compact Busbar Design Strategy for a 100 kW, 300 kHz Dual Active Bridge Converter Topology (2025)
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Heterogeneously Integrated 3.3 kV SiC MOSFET Power Module with Multi-layer Substrate and Built-in Gate Drivers (2025)
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<i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC (2025)
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Evaluation of Heat Spreading Technologies Within Double-Side-Cooled Power Modules (2025)
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Use of E-Beam Lithography to Optimize Lithography Patterning on SiC Wafers (2025)
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Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications (2025)
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Substrate-Less Power Semiconductor Packaging for the Potential of Recyclability (2025)
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Multiobjective Optimization and Enhanced Design of an Ω-Shaped Current Sensor for WBG Devices (2025)
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Design and Characterization of 1.2 kV Optically Isolated Half-Bridge Modules for High Temperature Operation (2024)
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Multi-tier Cooling Solution for 10 kV SiC MOSFET Power Module Featuring Stacked Substrates (2024)
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Optimal Point Derive for SiC MOSFET Switching Ringing Damping with Active Gate Driver Control (2024)
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Evaluation of the Bonding Strength of Die Attachment Techniques for Gallium Oxide Power Devices (2024)
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A 10 kV SiC MOSFET Power Module With Optimized System Interface and Electric Field Distribution (2024)
Collaboration Network
Top Collaborators
- A review of silicon carbide CMOS technology for harsh environments
- Substrate-Less Power Semiconductor Packaging for the Potential of Recyclability
- A 10 kV SiC MOSFET Power Module With Optimized System Interface and Electric Field Distribution
- Design and Optimization of SiC MOSFET Wire Bondless Power Modules
- A Tutorial on High-Density Power Module Packaging
Showing 5 of 24 shared publications
- A 10 kV SiC MOSFET Power Module With Optimized System Interface and Electric Field Distribution
- Design and Optimization of SiC MOSFET Wire Bondless Power Modules
- High Voltage SiC Power Module Optimized for Low Parasitics and Compatible System Interface
- EMI Mitigation with Stacking DBC Substrate for High Voltage Power Module
- Feasibility Design of Tight Integration of Low Inductance SiC Power Module with Microchannel Cooler
Showing 5 of 12 shared publications
- A 10 kV SiC MOSFET Power Module With Optimized System Interface and Electric Field Distribution
- Design and Optimization of SiC MOSFET Wire Bondless Power Modules
- High Voltage SiC Power Module Optimized for Low Parasitics and Compatible System Interface
- 3.3 kV Low-Inductance Full SiC Power Module
- Demonstration of Wire Bondless Silicon Carbide Power Module with Integrated LTCC Jet Impingement Cooler
Showing 5 of 8 shared publications
- Substrate-Less Power Semiconductor Packaging for the Potential of Recyclability
- EMI Mitigation with Stacking DBC Substrate for High Voltage Power Module
- 3.3 kV Low-Inductance Full SiC Power Module
- Demonstration of Wire Bondless Silicon Carbide Power Module with Integrated LTCC Jet Impingement Cooler
- Demonstration and Optimization of a 250°C LTCC-based Gate Driver for High Density, High-Temperature Power Modules
Showing 5 of 8 shared publications
- Design and Optimization of Gate Driver Integrated Multichip 3-D GaN Power Module
- High Voltage SiC Power Module Optimized for Low Parasitics and Compatible System Interface
- EMI Mitigation with Stacking DBC Substrate for High Voltage Power Module
- Feasibility Design of Tight Integration of Low Inductance SiC Power Module with Microchannel Cooler
- Fabrication Process Optimization of A High- Power Double-Sided Cooled SiC Power Module
Showing 5 of 7 shared publications
- Design and Optimization of Gate Driver Integrated Multichip 3-D GaN Power Module
- A Tutorial on High-Density Power Module Packaging
- Toward Direct Cooling in High Voltage Power Electronics: Dielectric Fluid Microchannel Embedded Source Bussing Terminal
- Fabrication Process Optimization of A High- Power Double-Sided Cooled SiC Power Module
- Compact Busbar Design Strategy for a 100 kW, 300 kHz Dual Active Bridge Converter Topology
Showing 5 of 7 shared publications
- A review of silicon carbide CMOS technology for harsh environments
- A Tutorial on High-Density Power Module Packaging
- Use of E-Beam Lithography to Optimize Lithography Patterning on SiC Wafers
- Demonstration and Optimization of a 250°C LTCC-based Gate Driver for High Density, High-Temperature Power Modules
- Fabrication Process Optimization of A High- Power Double-Sided Cooled SiC Power Module
Showing 5 of 7 shared publications
- 3.3 kV Low-Inductance Full SiC Power Module
- A Nonlinear-Model-Based High-Bandwidth Current Sensor Design for Switching Current Measurement of Wide Bandgap Devices
- Multiobjective Optimization and Enhanced Design of an Ω-Shaped Current Sensor for WBG Devices
- Compact Busbar Design Strategy for a 100 kW, 300 kHz Dual Active Bridge Converter Topology
- A Build-in Gate Driver Design for 1.7kV SiC MOSFET Module with 32-chip Paralleled
Showing 5 of 7 shared publications
- A Nonlinear-Model-Based High-Bandwidth Current Sensor Design for Switching Current Measurement of Wide Bandgap Devices
- Multiobjective Optimization and Enhanced Design of an Ω-Shaped Current Sensor for WBG Devices
- Fabrication Process Optimization of A High- Power Double-Sided Cooled SiC Power Module
- A Build-in Gate Driver Design for 1.7kV SiC MOSFET Module with 32-chip Paralleled
- Heterotypic Current Transformer Design for Overcurrent Protection of SiC MOSFET
Showing 5 of 6 shared publications
- Fabrication of biaxially aligned YBa2Cu3O7−x thin films on glass substrates
- Improvement of in-plane alignment of YBa2Cu3O7−x films on polycrystalline alumina substrates using biaxially aligned CeO2/YSZ buffer layers
- Tl2Ba2CaCu2Oy superconducting thin films on polycrystalline Al2O3 substrates with textured YSZ buffer layers
- Enhancement of critical current density in Tl2Ba2CaCu2Oy superconducting thin film on polycrystalline Al2O3 substrates using textured YSZ buffer layers
- Fabrication techniques and electrical properties of YBa2Cu3O7−x multilayers with rf sputtered amorphous SiO2 interlayers
- Fabrication of biaxially aligned YBa2Cu3O7−x thin films on glass substrates
- Improvement of in-plane alignment of YBa2Cu3O7−x films on polycrystalline alumina substrates using biaxially aligned CeO2/YSZ buffer layers
- Tl2Ba2CaCu2Oy superconducting thin films on polycrystalline Al2O3 substrates with textured YSZ buffer layers
- Enhancement of critical current density in Tl2Ba2CaCu2Oy superconducting thin film on polycrystalline Al2O3 substrates using textured YSZ buffer layers
- Fabrication techniques and electrical properties of YBa2Cu3O7−x multilayers with rf sputtered amorphous SiO2 interlayers
- Fabrication of biaxially aligned YBa2Cu3O7−x thin films on glass substrates
- Improvement of in-plane alignment of YBa2Cu3O7−x films on polycrystalline alumina substrates using biaxially aligned CeO2/YSZ buffer layers
- Tl2Ba2CaCu2Oy superconducting thin films on polycrystalline Al2O3 substrates with textured YSZ buffer layers
- Enhancement of critical current density in Tl2Ba2CaCu2Oy superconducting thin film on polycrystalline Al2O3 substrates using textured YSZ buffer layers
- Fabrication techniques and electrical properties of YBa2Cu3O7−x multilayers with rf sputtered amorphous SiO2 interlayers
- High Voltage SiC Power Module Optimized for Low Parasitics and Compatible System Interface
- EMI Mitigation with Stacking DBC Substrate for High Voltage Power Module
- Feasibility Design of Tight Integration of Low Inductance SiC Power Module with Microchannel Cooler
- 3.3 kV Low-Inductance Full SiC Power Module
- A 4.16kV/750kVA MV Power Conditioning System for Distribution System Applications
- A review of silicon carbide CMOS technology for harsh environments
- Demonstration and Optimization of a 250°C LTCC-based Gate Driver for High Density, High-Temperature Power Modules
- Design and Characterization of 1.2 kV Optically Isolated Half-Bridge Modules for High Temperature Operation
- Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications
- <i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
- Fabrication of biaxially aligned YBa2Cu3O7−x thin films on glass substrates
- Improvement of in-plane alignment of YBa2Cu3O7−x films on polycrystalline alumina substrates using biaxially aligned CeO2/YSZ buffer layers
- Tl2Ba2CaCu2Oy superconducting thin films on polycrystalline Al2O3 substrates with textured YSZ buffer layers
- Fabrication techniques and electrical properties of YBa2Cu3O7−x multilayers with rf sputtered amorphous SiO2 interlayers
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