Hui Wang
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Researcher
Also affiliated: Rutherford Appleton Laboratory (2010–2018); Zhejiang Normal University (1994); North University of China (2009); University of Connecticut (1997); Xidian University (2008–2015); Shandong University (2002–2023); Science and Technology Facilities Council (2015–2016); Henan University of Science and Technology (2008); Politecnico di Torino (2014–2015); Xi'an Shiyou University (2019); Anhui University of Finance and Economics (2008); Chinese Academy of Sciences (2011–2021); Harbin Institute of Technology (2025); Nankai University (2008); Shandong Normal University (2011); Southern University of Science and Technology (2016); Henan University of Technology (2014); Nanjing University of Posts and Telecommunications (2021–2022); State Key Laboratory on Integrated Optoelectronics (2011); II-VI (United States) (2021); Hua Hong Semiconductor (China) (2025); Xi'an Technological University (2019); Shanghai Advanced Research Institute (2021); Shandong Provincial Hospital (2016); Shanxi University of Traditional Chinese Medicine (2019); Changchun Institute of Technology (2024); Institute of Semiconductors (2011); China Central Television (2019); Henan Radio and Television University (2019); Shanghai Institute of Ceramics (2013); University of Chinese Academy of Sciences (2013); Network Group (Czechia) (2019); Henan Polytechnic University (2011); Shanxi Transportation Research Institute (2014); State Key Laboratory of Industrial Control Technology (2013–2015); State Key Laboratory of Crystal Materials (2013); Nagoya University (2015); Communication University of China (2009–2013); Zhejiang University (2013–2015); University of Science and Technology Beijing (2021)
Faculty Researcher
Research Areas
Biomedical Subjects
Links
Biography and Research Information
OverviewAI-generated summary
Hui Wang is a faculty member at the University of Arkansas at Fayetteville with a research focus on semiconductor materials and devices, particularly silicon carbide (SiC) technology. His work investigates the characterization, fabrication, and optimization of SiC-based components for various applications, including harsh environments and on-chip electrostatic discharge (ESD) protection. Wang has published research on SiC CMOS technology, SiC MOSFETs, and SiC SCR devices, exploring their performance under challenging conditions like high temperatures and bias temperature instability. His publications also extend to flash memory cell fabrication and flexible terahertz beam manipulation using light-controllable digital coding metasurfaces. Wang's scholarly contributions include an h-index of 16 and over 1,000 citations across 82 publications. He actively collaborates with researchers at the University of Arkansas, including Pengyu Lai, Zhong Chen, and Kevin Chen.
Metrics
- h-index: 16
- Publications: 82
- Citations: 1,043
Selected Publications
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Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity (2025)
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TCAD-Aided Investigation of Temperature-Dependent Behavior in 4H-SiC P-Channel MOSFETs Up to 500°C (2025)
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<i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC (2025)
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Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications (2025)
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Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures (2024)
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Electrical Safe Operating Area and Latent Damage of SiC Low-Voltage nMOS Under TLP and VF-TLP Stresses (2024)
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A review of silicon carbide CMOS technology for harsh environments (2024)
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Current Injection Effect on ESD Behaviors of the Parasitic Bipolar Transistors inside P+/N-well diode (2023)
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Characterization of Gate-Oxide Degradation Location for SiC MOSFETs Based on the Split <i>C–V</i> Method Under Bias Temperature Instability Conditions (2023)
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Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection (2022)
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Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections (2021)
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Investigation of ESD Protection in SiC BCD Process (2019)
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Investigation of parasitic bipolar transistor in rail-based electrostatic discharge (ESD) protection circuits (2019)
Collaboration Network
Top Collaborators
- A review of silicon carbide CMOS technology for harsh environments
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Electrical Safe Operating Area and Latent Damage of SiC Low-Voltage nMOS Under TLP and VF-TLP Stresses
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
Showing 5 of 8 shared publications
- A review of silicon carbide CMOS technology for harsh environments
- Characterization of Gate-Oxide Degradation Location for SiC MOSFETs Based on the Split <i>C–V</i> Method Under Bias Temperature Instability Conditions
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Electrical Safe Operating Area and Latent Damage of SiC Low-Voltage nMOS Under TLP and VF-TLP Stresses
Showing 5 of 7 shared publications
- A review of silicon carbide CMOS technology for harsh environments
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Electrical Safe Operating Area and Latent Damage of SiC Low-Voltage nMOS Under TLP and VF-TLP Stresses
- Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications
- <i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
Showing 5 of 7 shared publications
- A review of silicon carbide CMOS technology for harsh environments
- <i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
- Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Current Injection Effect on ESD Behaviors of the Parasitic Bipolar Transistors inside P+/N-well diode
- <i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
- A review of silicon carbide CMOS technology for harsh environments
- Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity
- A review of silicon carbide CMOS technology for harsh environments
- Characterization of Silicon Carbide Low-Voltage n/p-Channel MOSFETs at High Temperatures
- Design Optimizations of Micrometer SiC CMOS Devices for High-Temperature IC Applications
- <i>(Invited)</i> High-Temperature Reliability of Ti-Based Ohmic Contacts to SiC
- TCAD-Aided Investigation of Temperature-Dependent Behavior in 4H-SiC P-Channel MOSFETs Up to 500°C
- Fabrication and Characterization of 4H-SiC Schottky Barrier Diodes with Highly Linear Temperature Sensitivity
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
- Area-efficient dual-diode with optimized parasitic bipolar structure for rail-based ESD protections
- Area-Efficient Silicon Carbide SCR Device for On-Chip ESD Protection
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